Interrupt enable register.
EXT_RECEIVE_INT_ENA | 1: enabled, when the receive buffer status is ‘full’ the TWAI controller requests the respective interrupt. 0: disable |
EXT_TRANSMIT_INT_ENA | 1: enabled, when a message has been successfully transmitted or the transmit buffer is accessible again (e.g. after an abort transmission command), the TWAI controller requests the respective interrupt. 0: disable |
EXT_ERR_WARNING_INT_ENA | 1: enabled, if the error or bus status change (see status register. Table 14), the TWAI controllerrequests the respective interrupt. 0: disable |
EXT_DATA_OVERRUN_INT_ENA | 1: enabled, if the data overrun status bit is set (see status register. Table 14), the TWAI controllerrequests the respective interrupt. 0: disable |
TS_COUNTER_OVFL_INT_ENA | enable the timestamp counter overflow interrupt request. |
ERR_PASSIVE_INT_ENA | 1: enabled, if the error status of the TWAI controller changes from error active to error passive or vice versa, the respective interrupt is requested. 0: disable |
ARBITRATION_LOST_INT_ENA | 1: enabled, if the TWAI controller has lost arbitration, the respective interrupt is requested. 0: disable |
BUS_ERR_INT_ENA | 1: enabled, if an bus error has been detected, the TWAI controller requests the respective interrupt. 0: disable |
IDLE_INT_ENA | 1: enabled, if state of TWAI become IDLE, the TWAI controller requests the respective interrupt. 0: disable |